|ADC/DAC Design 2013|
Master Trainer : Prof Michiel SJ Steyeart
Course Outline ( 1 Day )
1. High speed AD converters
Speed limitations in high speed CMOS AD's. Interpolating and folding topologies. Averaging techniques to achieve high performance ADC.
2. High-Speed D/A Converters
Analysis of CMOS DA architectures and the mismatch behavior. Discussion of static errors and lay-out issues. Discussion of the dynamic errors and circuit techniques to improve it. Case study of a high speed CMOS DAC structure.
3. Nanometer Delta-Sigma Design
The design of Delta-Sigma converters in nanometer CMOS result in different topology selections and design requirements. In this lecture both the architecture and circuit implementation structures such as amplifiers, switches and biasing circuit s are explored for nanometer technologies. Several design examples and performances are analyzed and discussed.
4. Continuous-Time Delta Sigma Design
Continuous time Delta-Sigma Converters For high accuracy Sigma-Delta (SD) ADC's are very popular due to their robustness towards implementation in CMOS technologies. However due to the typically switched capacitor (SC) implementation, speed limitations and aliasing in telecom architectures limit their use. For that continuous time (CT) implementations are investigated for telecom applications. In this presentation an overview of the differences, advantages and disadvantages of CT and SC SD are discussed. Due to the CT nature, jitter issues are becoming important. For that low sensitive feed back (Vref) techniques are described. Some design cases towards low voltage nanometer technologies are studied.
About Prof Michiel S.J Steyaert
Prof Michiel S.J. Steyaert received the masters degree in electrical-mechanical engineering and the Ph.D. degree in electronics from the Katholieke Universiteit Leuven (K.U.Leuven), Heverlee, Belgium in 1983 and 1987, respectively.
From 1983 to 1986 he obtained an IWNOL fellowship (Belgian National Foundation for Industrial Research) which allowed him to work as a Research Assistant at the Laboratory ESAT at K.U.Leuven. In 1987 he was responsible for several industrial projects in the field of analog micro power circuits at the Laboratory ESAT as an IWONL Project Researcher. In 1988 he was a Visiting Assistant Professor at the University of California, Los Angeles. In 1989 he was appointed by the National Fund of Scientific Research (Belgium) as Research Associate, in 1992 as a Senior Research Associate and in 1996 as a Research Director at the Laboratory ESAT, K.U.Leuven. Between 1989 and 1996 he was also a part-time Associate Professor. He is now a Full Professor at the K.U.Leuven and the Chair of the Electrical Engineering Department. His current research interests are in high-performance and high-frequency analog integrated circuits for telecommunication systems and analog signal processing.
Prof.Steyaert authored or co-authored over 400 papers in international journals or proceedings and co-authored over 15 books. He received the 1990 and 2001 European Solid-State Circuits Conference Best Paper Award. He received the 1991 and the 2000 NFWO Alcatel-Bell-Telephone award for innovative work in integrated circuits for telecommunications. Prof.Steyaert received the 1995 and 1997 IEEE-ISSCC Evening Session Award, the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award and is currently an IEEE-Fellow. He was also recognized as one of the top 10 authors in the 50-year history of ISSCC.